 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 1/14 FEATURES o Realtime interpolation with selectable factors of x2, x4, x5, x8, x10, x16, x20, x25, x32, x50, x64 o Differential signal and index gating inputs o Input voltage range of 10 mVpp diff. to 1.5 Vpp diff. o Maximum input frequency of 300 kHz (to x8), 150 kHz (x10 to x16), 75 kHz (x20 and up) o Selectable hysteresis of 2.8 to 15.6 o Averaging filter over 16 samples o Latency less than 1 s o Differential encoder quadrature outputs o Electronic index signal generation o Startup behaviour: ABZ state defined by absolute sensor position within a period o Automatic offset correction for sensor and interpolator circuit o Static pin programming with four external resistors o Low power consumption from single-ended 3.3 V to 5 V supply o Extended temperature range of -40 to +125 C APPLICATIONS o Optical and magnetic position sensors o Rotary encoders o Linear encoders o Space constraint embedded solutions PACKAGES QFN24 BLOCK DIAGRAM PINA NINA + iC-TW4 VDD B - NB COSINE INPUT / A A PINB NINB + - SIN/D CONVERSION NA SINE INPUT / B 16 x FILTER AUTOMATIC OFFSET COMPENSATION PINZ Z NZ HYSTERESIS CFG1 NINZ ZERO INPUT SIGNAL PROCESSING GND 2 PIN-SETUP ABZGENERATOR CFG2 Copyright (c) 2010 iC-Haus http://www.ichaus.com iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 2/14 DESCRIPTION iC-TW4, operating on single-ended supplies of 3.3 V to 5 V, is a low cost interpolation device featuring an automatic signal conditioning and differential encoder quadrature outputs for cable drive. The chip is pin configured with four external resistors and needs no micro controller or EEPROM for operation or configuration. An adaptive algorithm is used to automatically cancel sensor and input amplifier offset voltages, therefore eliminating the need for cumbersome system calibration. The pin configuration selects for the interpolation between factors of x2 and x64, and adapts the input gain to cope with differential sensor signals between 10 mVpp to 1.5 Vpp. The interpolation engine accepts two differential sinusoidal input signals (sine and cosine) to produce a highly interpolated incremental output signal. Sensor bridges are directly interfaced with no external components required. iC-TW4 can also operate on single-ended input signals when tying the negative input terminals to the signal reference, usually VDD/2. The index gating inputs can interface a wide range of index sensors, a Hall switch or MR bridge sensor, for instance. iC-TW4 generates the index pulse for every sine/cosine signal period that is released by the gating signal. The pulse output is one increment wide and is located at the positive crossover of the A versus the B inputs. By swapping pins PINA and NINA or pins PINB and NINB it is possible to achieve any desired phase relationship of the Z output versus the A and B outputs, respectively. The device also supports a variety of test modes for device verification and production test. A built in power-on-reset circuit keeps the device in reset mode until the applied power supply voltage permits reliable operation. CONTENTS PACKAGES ABSOLUTE MAXIMUM RATINGS THERMAL DATA ELECTRICAL CHARACTERISTICS INPUT STAGE Programmable Gain Amplifier . . . . . . . . . Automated Offset Adjustment . . . . . . . . . Limits of Automated Offset Adjustment . . . . 3 4 4 5 7 7 7 7 TYPICAL APPLICATIONS 13 CONFIGURATION Interpolation . Performance . Amplification . Test Modes . . 8 8 9 9 9 10 11 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . INDEX GATING Calibration Mode . . . . . . . . . . . . . . . . START UP iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 3/14 PACKAGES PIN CONFIGURATION QFN24 4 mm x 4 mm Orientation of the package label ( TW4 code...) is subject to change. PIN FUNCTIONS No. Name Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 TP n.c. NZ B NB A n.c. n.c. NA GND CFG1 CFG2 n.c. n.c. PINB NINB NINA PINA n.c. n.c. PINZ NINZ VDD Z n.c. n.c. Index Output ZIndex Output B+ Index Output BIndex Output A+ n.c. n.c. Index Output AGround Configuration Pin 1 Configuration Pin 2 n.c. n.c. Pos. Signal Input Channel B Neg. Signal Input Channel B Neg. Signal Input Channel A Pos. Signal Input Channel A n.c. n.c. Pos. Index Enable Input Neg. Index Enable Input +3 V to 5 V Power Supply Index Output Z+ n.c. Thermal Pad 24 23 22 21 20 19 1 18 2 17 3 16 4 5 TW4 code... ... 15 14 6 13 7 8 9 10 11 12 The Thermal Pad of the QFN package (bottom side) is to be connected to a ground plane on the PCB which must have GND potential. iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 4/14 ABSOLUTE MAXIMUM RATINGS These ratings do not imply operating conditions; functional operation is not guaranteed. Beyond these values damage may occur. Item No. Symbol Parameter Supply Voltage VDD Conditions Min. referenced to GND -0.3 -0.3 Voltage at referenced to GND PINA, NINA, PINB, NINB, PINZ, NINZ, A, NA, B, NB, Z, NZ, CFG1, CFG2 Current in PINA, NINA, PINB, NINB, PINZ, NINZ, CFG1, CFG2, A, NA, B, NB, Z, NZ ESD Susceptibility Of Signal Output Pins: A, NA, B, NB, Z, NZ HBM, 100 pF discharged through 1.5k Max. 6 VDD + 0.5 20 V V Unit G001 VDD G002 V() G003 I() -20 mA G004 Vd G005 Vd 2 1.5 kV kV ESD Susceptibility Of Remaining Pins: HBM, 100 pF discharged through 1.5k PINA, NINA, PINB, NINB, PINZ, NINZ, CFG1, CFG2 Junction Temerature Storage Temperature -40 -40 G006 Tj G007 Ts 125 125 C C THERMAL DATA Item No. T01 T02 Symbol Ta Rthaj Parameter Operating Ambient Temperature Thermal Resistance Chip To Ambient QFN24 surface mounted to PCB, following JEDEC 51 Conditions Min. -40 32 Typ. Max. 125 C K/W Unit All voltages are referenced to ground unless otherwise stated. All currents flowing into the device pins are positive; all currents flowing out of the device pins are negative. iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 5/14 ELECTRICAL CHARACTERISTICS Operating conditions: VDD = 3.0...5.5 V, Ta = -40...125 C, reference point GND unless otherwise stated Item No. 001 002 Symbol Parameter Conditions Min. VDD I(VDD) Permissible Supply Voltage VDD Total Supply Current VDD = 3.3 V; f()in = 0 Hz VDD = 3.3 V; f()in = 100 kHz VDD = 5.5 V; f()in = 0 Hz VDD = 5.5 V; f()in = 100 kHz Vc()hi = V() - VDD; I() = 10 mA I() = -10 mA 0.5 -1.2 1.4 6.0 1 G(CHA) vs. G(CHB) 0.85 -12 248 fosc /20000 V() = 0 .. VDD VDD = 3.0 V Tj = -40 to 125C, VDD const. VDD = 3.0 V to 5.5 V, Tj const. -50 15 -20 0 0.0 -15 V() = 0 .. VDD source and sink, per pin Vs()hi = V(VDD) -V(); I() = -6 mA; VDD = 3.3 V +/- 10 % VDD = 5 V +/- 10 % V() = GND; short-circuit time 10 ms maximum I() = 6 mA; VDD = 3.3 V +/- 10 % VDD = 5 V +/- 10 % V() = VDD; short-circuit time 10 ms maximum V(): 10 to 90%, VDD = 3.3 V, CL() = 10 pF V(): 90 to 10%, VDD = 3.3 V, CL() = 10 pF referred to period T, see Fig. 1 referred to period T, see Fig. 1 see Fig. 1 50 25 1/fosc 10 -100 -50 -10 50 24 0 25 VDD 15 50 10 0.65 0.5 -10 0.5 0.35 140 4 nA MHz % % V mV nA mA V V mA V V mA ns 1.15 12 mV mV 3.0 Typ. Max. 5.5 5 8 10 15 1.2 -0.3 VDD - 1 V mA mA mA mA V V V dB dB Unit Total Device 003 004 A01 A02 A03 A04 A05 A06 A07 A08 B01 B02 B03 Vc()hi Vc()lo Vin()sig G AGA() CGM Vos()in Vosr()out fmax()in Ilk() fosc f(T) f(V) Clamp-Voltage hi at all pins Clamp-Voltage lo at all pins Permissible Input Voltage Range Nominal Gain Step Size Absolute Gain Accuracy Gain Matching Input Referred Offset Voltage Output Referred Offset Correction Range Maximum Input Frequency For Offset Correction Input Current Internal Oscillator Frequency Frequency Variation Frequency Variation Permissible Input Signal Range Input Referred Offset Voltage Input Current Permissible DC Load Current Output Saturation Voltage hi Amplifier Inputs PINA, NINA, PINB, NINB Oscillator Zero Input Signals PINZ, NINZ C01 Vin()sig C02 Vin()os C03 Ilk() D01 I()max D02 Vs()hi Digital Outputs A, NA, B, NB, Z, NZ D03 Isc()hi D04 Vs()lo Short-Circuit Current hi Output Saturation Voltage lo D05 Isc()lo D06 tr() Short-Circuit Current lo Rise Time D07 tf() Fall Time 4 ns D08 twhi D09 tAB D10 tMTD Duty Cyle at Output A, B Output Phase A vs. B Minimum Transition Distance % % iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 6/14 ELECTRICAL CHARACTERISTICS Operating conditions: VDD = 3.0...5.5 V, Ta = -40...125 C, reference point GND unless otherwise stated Item No. Symbol Parameter Conditions Min. referred to 360 input period; Vin = 1.2 Vpp diff; IPF = x64; initial error with offset at maximum referred to 360 input period; Vin = 1.2 Vpp diff; IPF = x64; fin() = 35 Hz . . . 700 Hz (constant); offset correction completed after > 160 input signal periods see condition E02, but: IPF = x64 IPF = x2 to x32 -45 Typ. Max. 45 DEG Unit Signal Processing E01 AAabsOff Absolute Angular Accuracy with offset error E02 AAabs Absolute Angular Accuracy following offset compensation -7 7 DEG E03 AArel Relative Angular Accuracy -30 -20 1/2 AArel 1.8 30 20 % % % E04 ABrel Relative Angular Accuracy A vs. B Turn-on Threshold VDD (power on release) Startup Delay Power-On-Reset And Configuration F01 F02 VDDon tp()on V 35 ms tAB tMTD B twhi A twhi AArel T Figure 1: Relative phase distance AArel iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 7/14 INPUT STAGE Programmable Gain Amplifier A programmable gain amplifier (PGA) with output referred offset adjustment is used as input stage, shown in Figure 2. The gain is common for both channel A and B and is programmed through pin CFG2. matically and continuously. Amplifier offset and sensor offset are both eliminated offering a true plug-and-play system. Additional device or sensor calibration is not required as the iC-TW4 does all calibration automatically. In addition, the effect of temperature dependent offset drift of both the amplifier and the sensor is eliminated. Consider the Table 5 regarding the relationship between input signal peak-to-peak differential amplitude and resulting offset correction range. The sensor input signal offset must satisfy the requirement of Equation 1 as well as the limits set by Table 5. The sensor offset cannot lie outside of the correction range. Otherwise, the tracking engine is not able to converge. Equation 1: V AOFS 2 + V BOFS 2 < V R 2 Figure 2: Input stage Automated Offset Adjustment Parameter VAOFS VBOFS VIN VR Description Sensor offset input A Sensor offset input B Sensor input amplitude peak-peak differential VR = VIN /2 - 12 mV Unit mV mV mV mV Offset adjustment is provided at the output of the input amplifier. The offset correction is performed autoCFG2 configuration Input signal range Max allowed sensor offset* 0 800 mV - 1.5 V 400 mV 1 400 mV - 800 mV 232 mV 2 200 mV - 400 mV 112 mV 3 100 mV - 200 mV 50 mV 4 50 mV - 100 mV 19 mV 5 25 mV - 50 mV 3.5 mV 6 10 mV - 25 mV [out of range] * Notes: the values are based on amplifier input offset of 12 mV. Table 4: Parameters of equation Table 5: Input amplifier gain and offset Limits of Automated Offset Adjustment The Automated Offset Adjustment function is immune to monotonic acceleration (resp. deceleration) - i.e. changes in input frequency - over multiple (> 2) periods. Motion profiles with short steps or vibrations within up to 2 periods may accumulate offset and occasionally reduce accuracy to 1/8 of the period, which is +/-45 deg. iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 8/14 CONFIGURATION The iC-TW4 is configured by applying the appropriate voltage and impedance on its configuration pins CFG1 and CFG2. A two-resistor voltage divider is sufficient to generate the required configuration voltage. The resistor divider must be connected to VDD and GND of iC-TW4. The resistors should be placed as close as possible to pin CFG1 and CFG2 and no decoupling capacitor should be used. The resistors tolerance must be 1 % to guarantee reliable operation across all parametric corners. The configuration applied to pins CFG0 and CFG1 is not permitted to change during operation or unpredictable behaviour can result. In order to change the configuration a Power-On-Reset (POR) must be executed (power cycling). VDD Interpolation The interpolation factor is configured through pin CFG1. The recommended resister values shown in Table 6 should be used. IPF(Interpolation) x2 (8) x2 (8) x4 (16) x4 (16) x5 (20) x5 (20) x8 (32) x8 (32) x10 (40) x10 (40) x16 (64) x16 (64) x20 (80) x20 (80) x25 (100) x25 (100) x32 (128) x32 (128) x50 (200) x50 (200) x64 (256) x64 (256) Hysteresis 10.4 15.6 10.4 15.6 10.4 15.6 10.4 15.6 5.6 10.4 5.6 10.4 2.8 5.6 2.8 5.6 2.8 5.6 2.8 5.6 2.8 5.6 [V] at CFG1 0.13 * VDD 0.13 * VDD 0.2 * VDD 0.2 * VDD 0.27 * VDD 0.27 * VDD 0.33 * VDD 0.33 * VDD 0.4 * VDD 0.4 * VDD 0.46 * VDD 0.46 * VDD 0.54 * VDD 0.54 * VDD 0.6 * VDD 0.6 * VDD 0.67 * VDD 0.67 * VDD 0.73 * VDD 0.73 * VDD 0.8 * VDD 0.8 * VDD R1 [k ] 22.6 562 15.0 374 11.3 280 8.87 226 7.50 187 6.49 162 5.62 140 4.99 124 4.53 113 4.12 102 3.74 93.1 R2 [k ] 3.48 86.6 3.74 93.1 4.12 102 4.53 113 4.99 124 5.62 140 6.49 162 7.50 187 8.87 226 11.3 280 15.0 15.0 R1 CFG1 R2 VDD Don't use decoupling capacitors iC-TW4 R3 CFG2 R4 Use 1% resistors and place as close as possible to pin CFG1/CFG2 Table 6: Interpolation configuration Figure 3: Configuration iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 9/14 PINB-NINB PINA-NINA A B Interpolation of x5 shown PINZ-NINZ Z Index pulse is disabled through pin PINZ low Figure 4: Interpolation function Performance The device performance depends primarily on the selected interpolation rate. However, parametric manufacturing tolerances as well as power supply voltage and temperature has a defining impact on corner performance. Typical performance refers to nominal wafer parameters. Due to manufacturing variations the actual performance can be 20 % of stated typical performance. IPF x2 x4 x5 x8 x10 x16 x20 x25 x32 x50 x64 Typ. maximum input frequency 300 kHz 300 kHz 300 kHz 300 kHz 150 kHz 150 kHz 75 kHz 75 kHz 75 kHz 75 kHz 75 kHz Amplification The input amplifier gain is configured through pin CFG2. The recommended resistor values are shown in Table 8. 1 % tolerance resistors must be used. Input Amplitude, peak-peak differential 0.8 V - 1.5 V 400 mV - 800 mV 200 mV - 400 mV 100 mV - 200 mV 50 mV - 100 mV 25 mV - 50 mV 10 mV - 25 mV test only reserved reserved reserved [V] at CFG2 0.13 * VDD 0.20 * VDD 0.27 * VDD 0.33 * VDD 0.40 * VDD 0.46 * VDD 0.54 * VDD 0.60 * VDD 0.67 * VDD 0.73 * VDD 0.80 * VDD R3 [k ] 22.6 15.0 11.3 8.87 7.50 6.49 5.62 4.99 4.53 4.12 3.74 R4 [k ] 3.48 3.74 4.12 4.53 4.99 5.62 6.49 7.50 8.87 11.3 15.0 Table 8: Gain configuration Test Modes The iC-TW4 supports a variety of test modes. With the exception of index calibration all test modes are used for device verification and production test only. Please refer to section "Index Gating" on page 10 for details on how to use the index calibration mode. Table 7: Frequency range Typical performance at 25 C, maximum input frequency at 125 C is up to 10 % lower iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 10/14 Test mode PGA A PGA B Calib 1 Index calibration Offset Vc [V] at CFG1 0.8 * VDD 0.8 * VDD 0.87 * VDD 0.87 * VDD Z at CFG1 < 3 k > 75 k > 75 k < 3 k [V] at CFG2 Refer to table 8 Refer to table 8 Refer to table 8 Refer to table 8 Z at CFG2 > 75 k > 75 k < 3 k < 3 k 0.87 * VDD 0.87 * VDD < 3 k > 75 k Refer to table 8 Refer to table 8 > 75 k > 75 k Table 9: Test modes INDEX GATING The iC-TW4 can interface to a wide range of index gating sources. Most commonly used are the digital Hall sensor and the MR sensor bridge. The digital Hall sensor provides a large swing input signal to the iC-TW4. Depending on the polarity of the Hall it is either connected to pin NINZ or PINZ. Most Hall sensors use an open drain stage pulling the output low in the presence of a magnetic field. The unused terminal NINZ or PINZ should be biased to an adequate mid voltage level to guarantee good noise margin. Refer to Figure 5 for sample configurations. VDD VDD VDD PINZ PINZ PINZ VDD NINZ iC-TW4 NINZ MR index sensor iC-TW4 iC-TW4 NINZ Digital Hall active low Index gating using Hall sensor Index gating using MR bridge no Index Figure 5: Index configuration A MR sensor differential bridge can also be used to gate the index. Typically, the MR sensor provides a small signal amplitude. In addition, residual side lobes are present that can trigger double indexing. It might be necessary to externally adjust the sensor offset in order to fine-tune the desired threshold. The iC-TW4 provides a calibration mode, which allows the internal gating window to be observed. This simplifies product calibration as variation in sensor offset can be easily compensated for. Figure 6 shows a correctly set threshold when using an MR gating sensor. The side lobes are below the threshold line and no parasitic triggering occurs. iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 11/14 MR Sensor pin PINZ Input Z threshold Chip internal index window. This signal can be observed by enabling calib2 index window pin A_U pin B_V tsetup thold Index output, 1 increment wide pin Z_W Figure 6: Index gating Calibration Mode rect operation is guaranteed up to the maximum input frequency as specified in electrical characteristics No. A07. Parameter tsetup thold Description Index window setup time before rising edge of Z Index window hold time before falling edge of Z Min 0.8 s 0.8 s The calibration mode is enabled by choosing the index calibration mode of Table 9. The internal index window can now be observed on pin B. Index gating should be calibrated at sine/cosine input frequencies below 5 kHz to minimize the effect of latency. Timings shown in Table 10 is valid for input frequencies below 5 kHz. Once the timing is satisfied according to Table 10, cor- Table 10: Index gate timing iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 12/14 START UP Volts VDD 3.3 or 5.0 V 1.8 V 0.0 V Time 35 ms Power- On- Reset releases, iC-TW4 starts configuration Figure 7: Power supply ramp-up The iC-TW4 contains built-in Power-On-Reset (POR) circuitry. The POR keeps the device in reset as long as the applied power supply voltage does not allow reliable operation. Once the power supply ramps up above 1.8 V, the POR releases the reset and the iCTW4 starts the configuration cycle. 35 ms after the device goes out of reset, normal operation begins. The A/B signals on start-up follow reproducible the stable input signal state with a stable A/B output state. No A/B bursts are output on start-up with a stable input signal state. The state of the A/B output signals is defined by the absolute sensor position within a period. The phase relationship between Z and A/B is defined and persists. Due to hysteresis it is possible that the A/B output differs on start-up from the levels on power down. To avoid A/B output toggling while startup it is important that the power supply ramp-up is sufficiently fast and the input signals are stable as soon as normal operation begins. In applications where startup A/B toggling is acceptable, no precaution must be taken, as the iC-TW4 will properly power-up on an indefinitely slow supply rise time. iC-TW4 starts operation. iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 13/14 TYPICAL APPLICATIONS Figure 8 shows a device setup with an unipolar sensor signal. With the resistors R1, R2, R3, R4 and R5 it is possible to adjust to the sensor signal (compensation of amplitude, reference voltage, and sensor supply). Figure 9 shows a typical device setup with a sensor being connected to the input stages via differential bridges. Index gating uses a differential bridge as well. Note also that it is advisable to decouple the supply voltage with a capacitor. Resistor sizes on pins CFG1 and CFG2 need to be chosen in accordance with the desired operation mode. Refer to Table 6 for more details. Figure 9: Device setup using bridges Figure 8: Unipolar sensor signal adaption using resistors iC-Haus expressly reserves the right to change its products and/or specifications. An Infoletter gives details as to any amendments and additions made to the relevant current specifications on our internet website www.ichaus.de/infoletter; this letter is generated automatically and shall be sent to registered users by email. Copying - even as an excerpt - is only permitted with iC-Haus approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to. iC-TW4 PROGRAMMABLE INTERPOLATOR WITH AUTOMATIC OFFSET CORRECTION Rev D1, Page 14/14 ORDERING INFORMATION Type iC-TW4 Evaluation board Package 24 pin QFN, 4 mm x 4 mm Order Designation iC-TW4 QFN24 iC-TW4 EVAL TW41D For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Am Kuemmerling 18 D-55294 Bodenheim GERMANY Tel.: +49 (61 35) 92 92-0 Fax: +49 (61 35) 92 92-192 Web: http://www.ichaus.com E-Mail: sales@ichaus.com Appointed local distributors: http://www.ichaus.com/sales_partners |
Price & Availability of IC-TW4QFN24
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |